The present disclosure relates to a differential phase-frequency detector (PFD), and more specifically, to a differential PFD that is electrically coupled to a charge pump of a phase-locked-loop (PLL).
In a computer or other electronic system, clock signals may be used to control and sequence the flow of data between sequential storage elements, such as registers or latches on an integrated circuit. A clock circuit including a PLL may be useful to maintain precise phase relationships between a reference clock signal and a distributed clock signal that is used to sequence digital logic or other circuit elements. Precise clock phase relationships may be useful in achieving known and efficient timing relationships between sequential logic elements.